  F   8  x|   (              xD                                                         vscom,onrisc ti,am33xx           &            7OnRISC Baltos iR 5221      chosen        aliases          =/ocp/i2c@44e0b000            B/ocp/i2c@4802a000            G/ocp/i2c@4819c000            L/ocp/serial@44e09000             T/ocp/serial@48022000             \/ocp/serial@48024000             d/ocp/serial@481a6000             l/ocp/serial@481a8000             t/ocp/serial@481aa000             |/ocp/can@481cc000            /ocp/can@481d0000            /ocp/usb@47400000/usb@47401000           /ocp/usb@47400000/usb@47401800        #   /ocp/usb@47400000/usb-phy@47401300        #   /ocp/usb@47400000/usb-phy@47401b00        &   /ocp/ethernet@4a100000/slave@4a100200         &   /ocp/ethernet@4a100000/slave@4a100300         memory           memory                       cpus                                 cpu@0            arm,cortex-a8            cpu                         
  	' (   * 28 *                                 cpu                               pmu          arm,cortex-a8-pmu                    soc          ti,omap-infra      mpu          ti,omap3-mpu            mpu          ocp          simple-bus                                    '        l3_main    l4_wkup@44c00000             ti,am3-l4-wkup simple-bus                                    '    D   (     wkup_m3@100000           ti,am3352-wkup-m3                 @              
  .umem dmem           wkup_m3         8am335x-pm-firmware.elf          G   %        M   %      prcm@200000          ti,am3-prcm                @    clocks                               clk_32768_ck            U             fixed-clock         b           G           M         clk_rc32k_ck            U             fixed-clock         b  }         G           M         virt_19200000_ck            U             fixed-clock         b$         G            M          virt_24000000_ck            U             fixed-clock         bn6         G   !        M   !      virt_25000000_ck            U             fixed-clock         b}x@        G   "        M   "      virt_26000000_ck            U             fixed-clock         b        G   #        M   #      tclkin_ck           U             fixed-clock         b          G           M         dpll_core_ck            U             ti,am3-dpll-core-clock                              \  h        G           M         dpll_core_x2_ck         U             ti,am3-dpll-x2-clock                        G           M         dpll_core_m4_ck         U             ti,divider-clock                        r                       }        G           M         dpll_core_m5_ck         U             ti,divider-clock                        r                       }        G           M         dpll_core_m6_ck         U             ti,divider-clock                        r                       }      dpll_mpu_ck         U             ti,am3-dpll-clock                                  ,        G           M         dpll_mpu_m2_ck          U             ti,divider-clock                        r                       }      dpll_ddr_ck         U             ti,am3-dpll-no-gate-clock                               4  @        G           M         dpll_ddr_m2_ck          U             ti,divider-clock                        r                       }        G           M         dpll_ddr_m2_div2_ck         U             fixed-factor-clock                                          dpll_disp_ck            U             ti,am3-dpll-no-gate-clock                               H  T        G   	        M   	      dpll_disp_m2_ck         U             ti,divider-clock                	        r                       }                 G           M         dpll_per_ck         U          !   ti,am3-dpll-no-gate-j-type-clock                                p          G   
        M   
      dpll_per_m2_ck          U             ti,divider-clock                
        r                       }        G           M         dpll_per_m2_div4_wkupdm_ck          U             fixed-factor-clock                                          dpll_per_m2_div4_ck         U             fixed-factor-clock                                          cefuse_fck          U             ti,gate-clock                                     
       clk_24mhz           U             fixed-factor-clock                                            G           M         clkdiv32k_ck            U             fixed-factor-clock                                           G           M         clkdiv32k_ick           U             ti,gate-clock                                     L        G           M         l3_gclk         U             fixed-factor-clock                                            G           M         pruss_ocp_gclk          U             ti,mux-clock                              0      mmu_fck         U             ti,gate-clock                                     	      timer1_fck          U             ti,mux-clock                                       (      timer2_fck          U             ti,mux-clock                                       timer3_fck          U             ti,mux-clock                                       timer4_fck          U             ti,mux-clock                                       timer5_fck          U             ti,mux-clock                                       timer6_fck          U             ti,mux-clock                                       timer7_fck          U             ti,mux-clock                                       usbotg_fck          U             ti,gate-clock               
                      |      dpll_core_m4_div2_ck            U             fixed-factor-clock                                            G           M         ieee5000_fck            U             ti,gate-clock                                            wdt1_fck            U             ti,mux-clock                              8      l4_rtc_gclk         U             fixed-factor-clock                                          l4hs_gclk           U             fixed-factor-clock                                          l3s_gclk            U             fixed-factor-clock                                          l4fw_gclk           U             fixed-factor-clock                                          l4ls_gclk           U             fixed-factor-clock                                            G   $        M   $      sysclk_div_ck           U             fixed-factor-clock                                          cpsw_125mhz_gclk            U             fixed-factor-clock                                            G   ?        M   ?      cpsw_cpts_rft_clk           U             ti,mux-clock                                       G   @        M   @      gpio0_dbclk_mux_ck          U             ti,mux-clock                                 <        G           M         gpio0_dbclk         U             ti,gate-clock                                           gpio1_dbclk         U             ti,gate-clock                                            gpio2_dbclk         U             ti,gate-clock                                            gpio3_dbclk         U             ti,gate-clock                                            lcd_gclk            U             ti,mux-clock                                 4                 G           M         mmc_clk         U             fixed-factor-clock                                          gfx_fclk_clksel_ck          U             ti,mux-clock                                         ,        G           M         gfx_fck_div_ck          U             ti,divider-clock                           ,        r         sysclkout_pre_ck            U             ti,mux-clock                                                G           M         clkout2_div_ck          U             ti,divider-clock                                   r                       G           M         dbg_sysclk_ck           U             ti,gate-clock                                             G           M         dbg_clka_ck         U             ti,gate-clock                                             G           M         stm_pmd_clock_mux_ck            U             ti,mux-clock                                                 G           M         trace_pmd_clk_mux_ck            U             ti,mux-clock                                                 G           M         stm_clk_div_ck          U             ti,divider-clock                                   r   @                          trace_clk_div_ck            U             ti,divider-clock                                   r   @                          clkout2_ck          U             ti,gate-clock                                               clockdomains       clk_24mhz_clkdm          ti,clockdomain                          scm@210000           ti,am3-scm simple-bus             !                                       '     !         pinmux@800           pinctrl-single                8                                                    pinmux_mmc2_pins          8         2   $   2   (   2   ,   2      2      2     7        G   6        M   6      pinmux_wl12xx_gpio                       G   H        M   H      pinmux_tps65910_pins               x   7        G   1        M   1      pinmux_tca6416_pins              7        G   3        M   3      pinmux_i2c1_pins              X   *  \   *        G   0        M   0      pinmux_dcan1_pins             h   
  l   *        G   :        M   :      pinmux_uart0_pins             p   0  t            G   )        M   )      pinmux_uart1_pins         @       (     (  x   '  |               '      '      '        G   *        M   *      pinmux_uart2_pins         H    P   )  T   	     '        0      4   '   8   '   <   '     7        G   -        M   -      cpsw_default                 !       $     (     <   !  @   !  D       @      D   "   H      L      P      T      X      \   "   `   "   d   "   h   "   l   "        G   A        M   A      cpsw_sleep               '     '  $   '  (   '  <   '  @   '  D   '   @   '   D   '   H   '   L   '   P   '   T   '   X   '   \   '   `   '   d   '   h   '   l   '        G   B        M   B      davinci_mdio_default              H   0  L           G   C        M   C      davinci_mdio_sleep            H   '  L   '        G   D        M   D      nandflash_pins_s0         x         0      0      0      0      0      0      0      0   p   0   t   7   |                                   G   F        M   F         scm_conf@0           syscon                                                   G   8        M   8   clocks                               sys_clkin_ck            U             ti,mux-clock                    !   "   #                       @        G           M         adc_tsc_fck         U             fixed-factor-clock                                          dcan0_fck           U             fixed-factor-clock                                            G   7        M   7      dcan1_fck           U             fixed-factor-clock                                            G   9        M   9      mcasp0_fck          U             fixed-factor-clock                                          mcasp1_fck          U             fixed-factor-clock                                          smartreflex0_fck            U             fixed-factor-clock                                          smartreflex1_fck            U             fixed-factor-clock                                          sha0_fck            U             fixed-factor-clock                                          aes0_fck            U             fixed-factor-clock                                          rng_fck         U             fixed-factor-clock                                          ehrpwm0_tbclk@44e10664          U             ti,gate-clock               $                       d      ehrpwm1_tbclk@44e10664          U             ti,gate-clock               $                      d      ehrpwm2_tbclk@44e10664          U             ti,gate-clock               $                      d            wkup_m3_ipc@1324             ti,am3352-wkup-m3-ipc              $   $           N        .   %        7   &   '      clockdomains                interrupt-controller@48200000            ti,am33xx-intc           >        S            H              G           M         edma@49000000         	   ti,edma3            tpcc tptc0 tptc1 tptc2           I      D   @                         d           G   (        M   (      gpio@44e07000            ti,omap4-gpio           gpio1            o                    >        S            Dp               `                 G   ,        M   ,      gpio@4804c000            ti,omap4-gpio           gpio2            o                    >        S            H               b        G   .        M   .      gpio@481ac000            ti,omap4-gpio           gpio3            o                    >        S            H                        G   +        M   +      gpio@481ae000            ti,omap4-gpio           gpio4            o                    >        S            H               >        G   /        M   /      serial@44e09000          ti,am3352-uart ti,omap3-uart            uart1           bl          D                H        okay               (      (           tx rx           default            )      serial@48022000          ti,am3352-uart ti,omap3-uart            uart2           bl          H                 I        okay               (      (           tx rx           default            *           +                 +                 +                 +                 ,                 ,            serial@48024000          ti,am3352-uart ti,omap3-uart            uart3           bl          H@                J        okay               (      (           tx rx           default            -           .                 .                 .                 .                 /                 /            serial@481a6000          ti,am3352-uart ti,omap3-uart            uart4           bl          H`                ,      	  disabled          serial@481a8000          ti,am3352-uart ti,omap3-uart            uart5           bl          H                -      	  disabled          serial@481aa000          ti,am3352-uart ti,omap3-uart            uart6           bl          H                .      	  disabled          i2c@44e0b000             ti,omap4-i2c                                      i2c1             D               F      	  disabled          i2c@4802a000             ti,omap4-i2c                                      i2c2             H               G        okay            default            0        b    tps@2d              -         o                    &   .                      default            1         ti,tps65910         	   2           2        !   2        -   2        9   2        E   2        Q   2        ]   2        j      regulators                               regulator@0                      {vrtc                   regulator@1                     {vio                regulator@2                     {vdd1            vdd_mpu          t                                   G           M         regulator@3                     {vdd2          	  vdd_core             t         0                        regulator@4                     {vdd3                   regulator@5                     {vdig1                  regulator@6                     {vdig2                  regulator@7                     {vpll                   regulator@8                     {vdac                   regulator@9             	        {vaux1                  regulator@10                
        {vaux2                  regulator@11                        {vaux33                 regulator@12                        {vmmc             w@         2Z                 G   4        M   4      regulator@13                        {vbb             at24@50          at24,24c02                         P      gpio@20          ti,tca6416                        o                    &   ,                      default            3         i2c@4819c000             ti,omap4-i2c                                      i2c3             H                     	  disabled          mmc@48060000             ti,omap4-hsmmc          mmc1                               "           (      (           tx rx              @         &            H             okay            ?   4      mmc@481d8000             ti,omap4-hsmmc          mmc2                        (      (           tx rx                       &            H            okay            ?   5         K        \            f        default            6                             wlcore@2          
   ti,wl1835                        &   /                       mmc@47810000             ti,omap4-hsmmc          mmc3                                 &            G           	  disabled          spinlock@480ca000            ti,omap4-hwspinlock          H          	  spinlock            y         wdt@44e35000             ti,omap3-wdt          
  wd_timer2            DP               [      can@481cc000             ti,am3352-d_can         d_can0           H                 7         fck            8  D               4      	  disabled          can@481d0000             ti,am3352-d_can         d_can1           H                  9         fck            8  D              7        okay            default            :      mailbox@480C8000             ti,omap4-mailbox             H               M        mailbox                                          G   &        M   &   wkup_m3                                                G   '        M   '         timer@44e31000           ti,am335x-timer-1ms          D               C        timer1                 timer@48040000           ti,am335x-timer          H                D        timer2        timer@48042000           ti,am335x-timer          H                E        timer3        timer@48044000           ti,am335x-timer          H@               \        timer4                 timer@48046000           ti,am335x-timer          H`               ]        timer5                 timer@48048000           ti,am335x-timer          H               ^        timer6                 timer@4804a000           ti,am335x-timer          H               _        timer7                 rtc@44e3e000             ti,am3352-rtc ti,da830-rtc           D               K   L        rtc       spi@48030000             ti,omap4-mcspi                                     H                A                   spi0                (      (      (      (           tx0 rx0 tx1 rx1       	  disabled          spi@481a0000             ti,omap4-mcspi                                     H                }                   spi1                (   *   (   +   (   ,   (   -        tx0 rx0 tx1 rx1       	  disabled          usb@47400000             ti,am33xx-usb            G@              '                                 usb_otg_hs          okay       control@44e10620             ti,am335x-usb-ctrl-module            D    DH           .phy_ctrl wakeup         okay            G   ;        M   ;      usb-phy@47401300             ti,am335x-usb-phy            G@            .phy         okay               ;        G   <        M   <      usb@47401000             ti,musb-am33xx          okay             G@    G@            .mc control                     mc          "host            *           <           K           [          h   <     h     =           =          =          =          =          =          =          =          =          =   	       =   
       =          =          =          =          =          =         =         =         =         =         =         =         =         =   	      =   
      =         =         =         =              rx1 rx2 rx3 rx4 rx5 rx6 rx7 rx8 rx9 rx10 rx11 rx12 rx13 rx14 rx15 tx1 tx2 tx3 tx4 tx5 tx6 tx7 tx8 tx9 tx10 tx11 tx12 tx13 tx14 tx15       usb-phy@47401b00             ti,am335x-usb-phy            G@            .phy         okay               ;        G   >        M   >      usb@47401800             ti,musb-am33xx          okay             G@    G@            .mc control                     mc          "otg         *           <           K           [          h   >     h     =          =          =          =          =          =          =          =          =          =          =          =          =          =          =          =         =         =         =         =         =         =         =         =         =         =         =         =         =         =              rx1 rx2 rx3 rx4 rx5 rx6 rx7 rx8 rx9 rx10 rx11 rx12 rx13 rx14 rx15 tx1 tx2 tx3 tx4 tx5 tx6 tx7 tx8 tx9 tx10 tx11 tx12 tx13 tx14 tx15       dma-controller@47402000          ti,am3359-cppi41              G@     G@     G@0    G@@   @       #  .glue controller scheduler queuemgr                     glue            d           m           {           okay            G   =        M   =         epwmss@48300000          ti,am33xx-pwmss          H0             epwmss0                                	  disabled          $  'H0 H0    H0H0   H0 H0       ecap@48300100            ti,am33xx-ecap                      H0                       ecap0           ecap0         	  disabled          ehrpwm@48300200          ti,am33xx-ehrpwm                        H0            ehrpwm0       	  disabled             epwmss@48302000          ti,am33xx-pwmss          H0             epwmss1                                	  disabled          $  'H0! H0!    H0!H0!   H0" H0"       ecap@48302100            ti,am33xx-ecap                      H0!               /        ecap1           ecap1         	  disabled          ehrpwm@48302200          ti,am33xx-ehrpwm                        H0"            ehrpwm1       	  disabled             epwmss@48304000          ti,am33xx-pwmss          H0@            epwmss2                                	  disabled          $  'H0A H0A    H0AH0A   H0B H0B       ecap@48304100            ti,am33xx-ecap                      H0A               =        ecap2           ecap2         	  disabled          ehrpwm@48304200          ti,am33xx-ehrpwm                        H0B            ehrpwm2       	  disabled             ethernet@4a100000            ti,am335x-cpsw ti,cpsw          cpgmac0             ?   @      	   fck cpts                                                             @                                                                  J     J                                      &              (   )   *   +         '           8        okay            default sleep              A           B               mdio@4a101000            ti,davinci_mdio                                   davinci_mdio            * B@         J            okay            default sleep              C           D        G   E        M   E      slave@4a100200          3                ?   E            Frmii            O         slave@4a100300          3                ?   E           Frgmii-txid          O         cpsw-phy-sel@44e10650            ti,am3352-cpsw-phy-sel           DP         	  .gmii-sel            b            ocmcram@40300000          
   mmio-sram            @0           elm@48080000             ti,am3352-elm            H                         elm         okay            G   G        M   G      lcdc@4830e000            ti,am33xx-tilcdc             H0             &              $        lcdc          	  disabled          tscadc@44e0d000          ti,am3359-tscadc             D             &                      adc_tsc       	  disabled       tsc          ti,am3359-tsc         adc         q            ti,am3359-adc            gpmc@50000000            ti,am3352-gpmc          gpmc                      P                  d                                                       okay            default            F        '                 nand@0,0                                            bch8            polled          true                                               '   ,        9   ,        K           Z   "        m   ,                       (                       6           @           R           R        true            true                        '            A            X            p   (                                                G         sham@53100000            ti,omap4-sham           sham             S                m           (   $        rx          okay          aes@53500000             ti,omap4-aes            aes          SP                g           (      (           tx rx           okay          mcasp@48038000           ti,am33xx-mcasp-audio           mcasp0           H     F    @          .mpu dat            P   Q        tx rx         	  disabled               (      (   	        tx rx         mcasp@4803C000           ti,am33xx-mcasp-audio           mcasp1           H     F@   @          .mpu dat            R   S        tx rx         	  disabled               (   
   (           tx rx         rng@48310000             ti,omap4-rng            rng          H1                 o         fixedregulator@0             regulator-fixed         vbat             LK@         LK@                 G   2        M   2      fixedregulator@2            default            H         regulator-fixed         vwl1271          2Z         2Z           /                p                 G   5        M   5         	#address-cells #size-cells compatible interrupt-parent model i2c0 i2c1 i2c2 serial0 serial1 serial2 serial3 serial4 serial5 d_can0 d_can1 usb0 usb1 phy0 phy1 ethernet0 ethernet1 device_type reg operating-points voltage-tolerance clocks clock-names clock-latency cpu0-supply interrupts ti,hwmods ranges reg-names ti,pm-firmware linux,phandle #clock-cells clock-frequency ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-rate-parent ti,bit-shift ti,index-power-of-two pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,pins ti,rproc mboxes interrupt-controller #interrupt-cells #dma-cells gpio-controller #gpio-cells ti,no-reset-on-init status dmas dma-names pinctrl-names pinctrl-0 dtr-gpios dsr-gpios dcd-gpios rng-gpios cts-gpios rts-gpios vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vccio-supply ti,en-ck32k-xtal regulator-compatible regulator-always-on regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on pagesize ti,dual-volt ti,needs-special-reset ti,needs-special-hs-handling vmmc-supply ti,non-removable bus-width cap-power-off-card #hwlock-cells syscon-raminit #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,timer-alwon ti,timer-pwm ti,spi-num-cs ti,ctrl_mod interrupt-names dr_mode mentor,multipoint mentor,num-eps mentor,ram-bits mentor,power phys #dma-channels #dma-requests #pwm-cells cpdma_channels ale_entries bd_ram_size no_bd_ram rx_descs mac_control slaves active_slave cpts_clock_mult cpts_clock_shift syscon pinctrl-1 dual_emac bus_freq mac-address phy_id phy-mode dual_emac_res_vlan rmii-clock-ext #io-channel-cells ti,no-idle-on-init gpmc,num-cs gpmc,num-waitpins nand-bus-width ti,nand-ecc-opt ti,nand-xfer-type gpmc,device-nand gpmc,device-width gpmc,sync-clk-ps gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,we-on-ns gpmc,we-off-ns gpmc,oe-on-ns gpmc,oe-off-ns gpmc,access-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,wait-on-read gpmc,wait-on-write gpmc,bus-turnaround-ns gpmc,cycle2cycle-delay-ns gpmc,clk-activation-ns gpmc,wait-monitoring-ns gpmc,wr-access-ns gpmc,wr-data-mux-bus-ns elm_id gpio startup-delay-us enable-active-high 