     8  w   (            T  w`                                                      7   phytec,am335x-wega phytec,am335x-phycore-som ti,am33xx           &            7Phytec AM335x phyBOARD-WEGA    chosen        aliases          =/ocp/i2c@44e0b000            B/ocp/i2c@4802a000            G/ocp/i2c@4819c000            L/ocp/serial@44e09000             T/ocp/serial@48022000             \/ocp/serial@48024000             d/ocp/serial@481a6000             l/ocp/serial@481a8000             t/ocp/serial@481aa000             |/ocp/can@481cc000            /ocp/can@481d0000            /ocp/usb@47400000/usb@47401000           /ocp/usb@47400000/usb@47401800        #   /ocp/usb@47400000/usb-phy@47401300        #   /ocp/usb@47400000/usb-phy@47401b00        &   /ocp/ethernet@4a100000/slave@4a100200         &   /ocp/ethernet@4a100000/slave@4a100300            /ocp/i2c@44e0b000/rtc@68             /ocp/rtc@44e3e000         memory           memory           Ȁ            cpus                                 cpu@0            arm,cortex-a8            cpu                         
  	' (   * 28 *                                 cpu                              pmu          arm,cortex-a8-pmu                    soc          ti,omap-infra      mpu          ti,omap3-mpu            'mpu          ocp          simple-bus                                    1        'l3_main    l4_wkup@44c00000             ti,am3-l4-wkup simple-bus                                    1    D   (     wkup_m3@100000           ti,am3352-wkup-m3                 @              
  8umem dmem           'wkup_m3         Bam335x-pm-firmware.elf          Q   %        W   %      prcm@200000          ti,am3-prcm                @    clocks                               clk_32768_ck            _             fixed-clock         l           Q           W         clk_rc32k_ck            _             fixed-clock         l  }         Q           W         virt_19200000_ck            _             fixed-clock         l$         Q            W          virt_24000000_ck            _             fixed-clock         ln6         Q   !        W   !      virt_25000000_ck            _             fixed-clock         l}x@        Q   "        W   "      virt_26000000_ck            _             fixed-clock         l        Q   #        W   #      tclkin_ck           _             fixed-clock         l          Q           W         dpll_core_ck            _             ti,am3-dpll-core-clock                              \  h        Q           W         dpll_core_x2_ck         _             ti,am3-dpll-x2-clock                        Q           W         dpll_core_m4_ck         _             ti,divider-clock                        |                               Q           W         dpll_core_m5_ck         _             ti,divider-clock                        |                               Q           W         dpll_core_m6_ck         _             ti,divider-clock                        |                             dpll_mpu_ck         _             ti,am3-dpll-clock                                  ,        Q           W         dpll_mpu_m2_ck          _             ti,divider-clock                        |                             dpll_ddr_ck         _             ti,am3-dpll-no-gate-clock                               4  @        Q           W         dpll_ddr_m2_ck          _             ti,divider-clock                        |                               Q           W         dpll_ddr_m2_div2_ck         _             fixed-factor-clock                                          dpll_disp_ck            _             ti,am3-dpll-no-gate-clock                               H  T        Q   	        W   	      dpll_disp_m2_ck         _             ti,divider-clock                	        |                                        Q           W         dpll_per_ck         _          !   ti,am3-dpll-no-gate-j-type-clock                                p          Q   
        W   
      dpll_per_m2_ck          _             ti,divider-clock                
        |                               Q           W         dpll_per_m2_div4_wkupdm_ck          _             fixed-factor-clock                                          dpll_per_m2_div4_ck         _             fixed-factor-clock                                          cefuse_fck          _             ti,gate-clock                                     
       clk_24mhz           _             fixed-factor-clock                                            Q           W         clkdiv32k_ck            _             fixed-factor-clock                                           Q           W         clkdiv32k_ick           _             ti,gate-clock                                     L        Q           W         l3_gclk         _             fixed-factor-clock                                            Q           W         pruss_ocp_gclk          _             ti,mux-clock                              0      mmu_fck         _             ti,gate-clock                                     	      timer1_fck          _             ti,mux-clock                                       (      timer2_fck          _             ti,mux-clock                                       timer3_fck          _             ti,mux-clock                                       timer4_fck          _             ti,mux-clock                                       timer5_fck          _             ti,mux-clock                                       timer6_fck          _             ti,mux-clock                                       timer7_fck          _             ti,mux-clock                                       usbotg_fck          _             ti,gate-clock               
                      |      dpll_core_m4_div2_ck            _             fixed-factor-clock                                            Q           W         ieee5000_fck            _             ti,gate-clock                                            wdt1_fck            _             ti,mux-clock                              8      l4_rtc_gclk         _             fixed-factor-clock                                          l4hs_gclk           _             fixed-factor-clock                                          l3s_gclk            _             fixed-factor-clock                                          l4fw_gclk           _             fixed-factor-clock                                          l4ls_gclk           _             fixed-factor-clock                                            Q   $        W   $      sysclk_div_ck           _             fixed-factor-clock                                          cpsw_125mhz_gclk            _             fixed-factor-clock                                            Q   9        W   9      cpsw_cpts_rft_clk           _             ti,mux-clock                                       Q   :        W   :      gpio0_dbclk_mux_ck          _             ti,mux-clock                                 <        Q           W         gpio0_dbclk         _             ti,gate-clock                                           gpio1_dbclk         _             ti,gate-clock                                            gpio2_dbclk         _             ti,gate-clock                                            gpio3_dbclk         _             ti,gate-clock                                            lcd_gclk            _             ti,mux-clock                                 4                 Q           W         mmc_clk         _             fixed-factor-clock                                          gfx_fclk_clksel_ck          _             ti,mux-clock                                         ,        Q           W         gfx_fck_div_ck          _             ti,divider-clock                           ,        |         sysclkout_pre_ck            _             ti,mux-clock                                                Q           W         clkout2_div_ck          _             ti,divider-clock                                   |                       Q           W         dbg_sysclk_ck           _             ti,gate-clock                                             Q           W         dbg_clka_ck         _             ti,gate-clock                                             Q           W         stm_pmd_clock_mux_ck            _             ti,mux-clock                                                 Q           W         trace_pmd_clk_mux_ck            _             ti,mux-clock                                                 Q           W         stm_clk_div_ck          _             ti,divider-clock                                   |   @                          trace_clk_div_ck            _             ti,divider-clock                                   |   @                          clkout2_ck          _             ti,gate-clock                                               clockdomains       clk_24mhz_clkdm          ti,clockdomain                          scm@210000           ti,am3-scm simple-bus             !                                       1     !         pinmux@800           pinctrl-single                8                                                    pinmux_ethernet0          @  $     !     !     	  $   	  (   	  <   !  @   !  D            Q   ;        W   ;      pinmux_mdio         $  H   0  L           Q   =        W   =      pinmux_i2c0         $     (     (        Q   +        W   +      pinmux_nandflash          p  $       0      0      0      0      0      0      0      0   p   0   |                                   Q   ?        W   ?      pinmux_spi0          $  P      T      X   0  \   0        Q   4        W   4      pinmux_dcan1            $  h     l   2        Q   3        W   3      pinmux_ethernet1          p  $   @   	   D   !   H   	   L   	   P   	   T   	   X   !   \   !   `   !   d   !   h   !   l   !   t   !   x   !        Q   <        W   <      pinmux_mmc1       8  $      0      0      0      0      0     0  `   7        Q   .        W   .      pinmux_uart0            $  p   0  t            Q   )        W   )      pinmux_uart1_pins            $     0        x   (  |            Q   *        W   *         scm_conf@0           syscon                                                   Q   1        W   1   clocks                               sys_clkin_ck            _             ti,mux-clock                    !   "   #                       @        Q           W         adc_tsc_fck         _             fixed-factor-clock                                          dcan0_fck           _             fixed-factor-clock                                            Q   0        W   0      dcan1_fck           _             fixed-factor-clock                                            Q   2        W   2      mcasp0_fck          _             fixed-factor-clock                                          mcasp1_fck          _             fixed-factor-clock                                          smartreflex0_fck            _             fixed-factor-clock                                          smartreflex1_fck            _             fixed-factor-clock                                          sha0_fck            _             fixed-factor-clock                                          aes0_fck            _             fixed-factor-clock                                          rng_fck         _             fixed-factor-clock                                          ehrpwm0_tbclk@44e10664          _             ti,gate-clock               $                       d      ehrpwm1_tbclk@44e10664          _             ti,gate-clock               $                      d      ehrpwm2_tbclk@44e10664          _             ti,gate-clock               $                      d            wkup_m3_ipc@1324             ti,am3352-wkup-m3-ipc              $   $           N        8   %        A   &   '      clockdomains                interrupt-controller@48200000            ti,am33xx-intc           H        ]            H              Q           W         edma@49000000         	   ti,edma3            'tpcc tptc0 tptc1 tptc2           I      D   @                         n           Q   (        W   (      gpio@44e07000            ti,omap4-gpio           'gpio1            y                    H        ]            Dp               `        Q   /        W   /      gpio@4804c000            ti,omap4-gpio           'gpio2            y                    H        ]            H               b      gpio@481ac000            ti,omap4-gpio           'gpio3            y                    H        ]            H                      gpio@481ae000            ti,omap4-gpio           'gpio4            y                    H        ]            H               >      serial@44e09000          ti,am3352-uart ti,omap3-uart            'uart1           ll          D                H        okay               (      (           tx rx           default            )      serial@48022000          ti,am3352-uart ti,omap3-uart            'uart2           ll          H                 I        okay               (      (           tx rx           default            *      serial@48024000          ti,am3352-uart ti,omap3-uart            'uart3           ll          H@                J      	  disabled               (      (           tx rx         serial@481a6000          ti,am3352-uart ti,omap3-uart            'uart4           ll          H`                ,      	  disabled          serial@481a8000          ti,am3352-uart ti,omap3-uart            'uart5           ll          H                -      	  disabled          serial@481aa000          ti,am3352-uart ti,omap3-uart            'uart6           ll          H                .      	  disabled          i2c@44e0b000             ti,omap4-i2c                                      'i2c1             D               F        okay            default            +        l    pmic@2d             -         ti,tps65910            ,           ,           ,           ,           ,           ,           ,           ,   regulators                               regulator@0                      $vrtc             9      regulator@1                     $vio          9      regulator@2                     $vdd1            Mvdd_mpu         \ t        t                   9        Q           W         regulator@3                     $vdd2          	  Mvdd_core            \ t        t 0                  9      regulator@4                     $vdd3             9      regulator@5                     $vdig1           Mvdig1_1p8v          \ w@        t w@      regulator@6                     $vdig2            9      regulator@7                     $vpll             9      regulator@8                     $vdac             9      regulator@9             	        $vaux1            9      regulator@10                
        $vaux2            9      regulator@11                        $vaux33           9      regulator@12                        $vmmc            \ 2Z        t 2Z         9      regulator@13                        $vbb             eeprom@52            atmel,24c32                         R        okay          rtc@68           rv4162              h        okay             i2c@4802a000             ti,omap4-i2c                                      'i2c2             H               G      	  disabled          i2c@4819c000             ti,omap4-i2c                                      'i2c3             H                     	  disabled          mmc@48060000             ti,omap4-hsmmc          'mmc1                                          (      (           tx rx              @         &            H             okay               -                   default            .           /             mmc@481d8000             ti,omap4-hsmmc          'mmc2                        (      (           tx rx                       &            H          	  disabled          mmc@47810000             ti,omap4-hsmmc          'mmc3                                 &            G           	  disabled          spinlock@480ca000            ti,omap4-hwspinlock          H          	  'spinlock                     wdt@44e35000             ti,omap3-wdt          
  'wd_timer2            DP               [      can@481cc000             ti,am3352-d_can         'd_can0           H                 0         fck            1  D               4      	  disabled          can@481d0000             ti,am3352-d_can         'd_can1           H                  2         fck            1  D              7        okay            default            3      mailbox@480C8000             ti,omap4-mailbox             H               M        'mailbox         $           0           B           Q   &        W   &   wkup_m3         T                    _                   Q   '        W   '         timer@44e31000           ti,am335x-timer-1ms          D               C        'timer1           j      timer@48040000           ti,am335x-timer          H                D        'timer2        timer@48042000           ti,am335x-timer          H                E        'timer3        timer@48044000           ti,am335x-timer          H@               \        'timer4           y      timer@48046000           ti,am335x-timer          H`               ]        'timer5           y      timer@48048000           ti,am335x-timer          H               ^        'timer6           y      timer@4804a000           ti,am335x-timer          H               _        'timer7           y      rtc@44e3e000             ti,am3352-rtc ti,da830-rtc           D               K   L        'rtc       spi@48030000             ti,omap4-mcspi                                     H                A                   'spi0                (      (      (      (           tx0 rx0 tx1 rx1         okay            default            4   m25p80@0             m25p80          l                             	  disabled                                partition@0         xload                         partition@1         barebox                      partition@2         bareboxenv            
           partition@3         oftree                       partition@4         kernel                              spi@481a0000             ti,omap4-mcspi                                     H                }                   'spi1                (   *   (   +   (   ,   (   -        tx0 rx0 tx1 rx1       	  disabled          usb@47400000             ti,am33xx-usb            G@              1                                 'usb_otg_hs          okay       control@44e10620             ti,am335x-usb-ctrl-module            D    DH           8phy_ctrl wakeup         okay            Q   5        W   5      usb-phy@47401300             ti,am335x-usb-phy            G@            8phy         okay               5        Q   6        W   6      usb@47401000             ti,musb-am33xx          okay             G@    G@            8mc control                     mc          peripheral                                                         6     h     7           7          7          7          7          7          7          7          7          7   	       7   
       7          7          7          7          7          7         7         7         7         7         7         7         7         7   	      7   
      7         7         7         7              rx1 rx2 rx3 rx4 rx5 rx6 rx7 rx8 rx9 rx10 rx11 rx12 rx13 rx14 rx15 tx1 tx2 tx3 tx4 tx5 tx6 tx7 tx8 tx9 tx10 tx11 tx12 tx13 tx14 tx15       usb-phy@47401b00             ti,am335x-usb-phy            G@            8phy         okay               5        Q   8        W   8      usb@47401800             ti,musb-am33xx          okay             G@    G@            8mc control                     mc          host                                                           8     h     7          7          7          7          7          7          7          7          7          7          7          7          7          7          7          7         7         7         7         7         7         7         7         7         7         7         7         7         7         7              rx1 rx2 rx3 rx4 rx5 rx6 rx7 rx8 rx9 rx10 rx11 rx12 rx13 rx14 rx15 tx1 tx2 tx3 tx4 tx5 tx6 tx7 tx8 tx9 tx10 tx11 tx12 tx13 tx14 tx15       dma-controller@47402000          ti,am3359-cppi41              G@     G@     G@0    G@@   @       #  8glue controller scheduler queuemgr                     glue            n           "           0           okay            Q   7        W   7         epwmss@48300000          ti,am33xx-pwmss          H0             'epwmss0                                	  disabled          $  1H0 H0    H0H0   H0 H0       ecap@48300100            ti,am33xx-ecap          >            H0                       ecap0           'ecap0         	  disabled          ehrpwm@48300200          ti,am33xx-ehrpwm            >            H0            'ehrpwm0       	  disabled             epwmss@48302000          ti,am33xx-pwmss          H0             'epwmss1                                	  disabled          $  1H0! H0!    H0!H0!   H0" H0"       ecap@48302100            ti,am33xx-ecap          >            H0!               /        ecap1           'ecap1         	  disabled          ehrpwm@48302200          ti,am33xx-ehrpwm            >            H0"            'ehrpwm1       	  disabled             epwmss@48304000          ti,am33xx-pwmss          H0@            'epwmss2                                	  disabled          $  1H0A H0A    H0AH0A   H0B H0B       ecap@48304100            ti,am33xx-ecap          >            H0A               =        ecap2           'ecap2         	  disabled          ehrpwm@48304200          ti,am33xx-ehrpwm            >            H0B            'ehrpwm2       	  disabled             ethernet@4a100000            ti,am335x-cpsw ti,cpsw          'cpgmac0             9   :      	   fck cpts            I           X           d            p            z   @                                                                  J     J                                      &              (   )   *   +         1           1        okay            default            ;   <              mdio@4a101000            ti,davinci_mdio                                   'davinci_mdio             B@         J            okay            default            =        Q   >        W   >      slave@4a100200                             >            rmii                     slave@4a100300                             >           mii                  cpsw-phy-sel@44e10650            ti,am3352-cpsw-phy-sel           DP         	  8gmii-sel                      ocmcram@40300000          
   mmio-sram            @0           elm@48080000             ti,am3352-elm            H                         'elm         okay            Q   @        W   @      lcdc@4830e000            ti,am33xx-tilcdc             H0             &              $        'lcdc          	  disabled          tscadc@44e0d000          ti,am3359-tscadc             D             &                      'adc_tsc       	  disabled       tsc          ti,am3359-tsc         adc                     ti,am3359-adc            gpmc@50000000            ti,am3352-gpmc          'gpmc             .         P                  d        A           M                                    okay            default            ?        1                 nand@0,0                                _           nbch8            ~true                                                                                                                   '           6   
        D           S           b           s           true            true                           2                                         #           5            M   @                            partition@0         xload                         partition@1         xload_backup1                        partition@2         xload_backup2                        partition@3         xload_backup3                        partition@4         barebox                      partition@5         bareboxenv                       partition@6         oftree                       partition@7         kernel                       partition@8         root                                sham@53100000            ti,omap4-sham           'sham             S                m           (   $        rx          okay          aes@53500000             ti,omap4-aes            'aes          SP                g           (      (           tx rx           okay          mcasp@48038000           ti,am33xx-mcasp-audio           'mcasp0           H     F    @          8mpu dat            P   Q        tx rx         	  disabled               (      (   	        tx rx         mcasp@4803C000           ti,am33xx-mcasp-audio           'mcasp1           H     F@   @          8mpu dat            R   S        tx rx         	  disabled               (   
   (           tx rx         rng@48310000             ti,omap4-rng            'rng          H1                 o         regulators           simple-bus     fixedregulator@0             regulator-fixed         Mvcc5v           \ LK@        t LK@                  9        Q   ,        W   ,      fixedregulator@1             regulator-fixed         Mvcc3v3          \ 2Z        t 2Z                 Q   -        W   -            	#address-cells #size-cells compatible interrupt-parent model i2c0 i2c1 i2c2 serial0 serial1 serial2 serial3 serial4 serial5 d_can0 d_can1 usb0 usb1 phy0 phy1 ethernet0 ethernet1 rtc0 rtc1 device_type reg operating-points voltage-tolerance clocks clock-names clock-latency cpu0-supply interrupts ti,hwmods ranges reg-names ti,pm-firmware linux,phandle #clock-cells clock-frequency ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-rate-parent ti,bit-shift ti,index-power-of-two pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,pins ti,rproc mboxes interrupt-controller #interrupt-cells #dma-cells gpio-controller #gpio-cells status dmas dma-names pinctrl-names pinctrl-0 vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vccio-supply regulator-compatible regulator-always-on regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on pagesize ti,dual-volt ti,needs-special-reset ti,needs-special-hs-handling vmmc-supply bus-width cd-gpios #hwlock-cells syscon-raminit #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,timer-alwon ti,timer-pwm ti,spi-num-cs spi-max-frequency m25p,fast-read label ti,ctrl_mod interrupt-names dr_mode mentor,multipoint mentor,num-eps mentor,ram-bits mentor,power phys #dma-channels #dma-requests #pwm-cells cpdma_channels ale_entries bd_ram_size no_bd_ram rx_descs mac_control slaves active_slave cpts_clock_mult cpts_clock_shift syscon dual_emac bus_freq mac-address phy_id phy-mode dual_emac_res_vlan rmii-clock-ext #io-channel-cells ti,no-idle-on-init gpmc,num-cs gpmc,num-waitpins nand-bus-width ti,nand-ecc-opt gpmc,device-nand gpmc,device-width gpmc,sync-clk-ps gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,we-on-ns gpmc,we-off-ns gpmc,oe-on-ns gpmc,oe-off-ns gpmc,access-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,wait-on-read gpmc,wait-on-write gpmc,bus-turnaround-ns gpmc,cycle2cycle-delay-ns gpmc,cycle2cycle-diffcsen gpmc,clk-activation-ns gpmc,wait-monitoring-ns gpmc,wr-access-ns gpmc,wr-data-mux-bus-ns elm_id 