/* Generated automatically by the program `genconstants'
   from the machine description file `md'.  */

#ifndef GCC_INSN_CONSTANTS_H
#define GCC_INSN_CONSTANTS_H

#define FCC0_REGNUM 64
#define T0_REGNUM 12
#define FCC4_REGNUM 68
#define RETURN_ADDR_REGNUM 1
#define SIBCALL_RETURN 1
#define FCC7_REGNUM 71
#define EXCEPTION_RETURN 2
#define FCC6_REGNUM 70
#define FCC3_REGNUM 67
#define FCC2_REGNUM 66
#define T1_REGNUM 13
#define TP_REGNUM 2
#define MAX_PIC_BRANCH_LENGTH 100
#define NORMAL_RETURN 0
#define FCC5_REGNUM 69
#define S0_REGNUM 23
#define FCC1_REGNUM 65

enum unspec {
  UNSPEC_REVB_2H = 0,
  UNSPEC_REVB_4H = 1,
  UNSPEC_REVH_D = 2,
  UNSPEC_LOAD_LOW = 3,
  UNSPEC_LOAD_HIGH = 4,
  UNSPEC_STORE_WORD = 5,
  UNSPEC_MOVGR2FRH = 6,
  UNSPEC_MOVFRH2GR = 7,
  UNSPEC_FRINT = 8,
  UNSPEC_FCLASS = 9,
  UNSPEC_FMAX = 10,
  UNSPEC_FMIN = 11,
  UNSPEC_FTINT = 12,
  UNSPEC_FTINTRM = 13,
  UNSPEC_FTINTRP = 14,
  UNSPEC_FSCALEB = 15,
  UNSPEC_FLOGB = 16,
  UNSPEC_EH_RETURN = 17,
  UNSPEC_BITREV_4B = 18,
  UNSPEC_BITREV_8B = 19,
  UNSPEC_TLS = 20,
  UNSPEC_TLS_DESC = 21,
  UNSPEC_TLS_DESC_OFF64 = 22,
  UNSPEC_TIE = 23,
  UNSPEC_RSQRT = 24,
  UNSPEC_RSQRTE = 25,
  UNSPEC_RECIPE = 26,
  UNSPEC_CRC = 27,
  UNSPEC_CRCC = 28,
  UNSPEC_LOAD_FROM_GOT = 29,
  UNSPEC_PCALAU12I = 30,
  UNSPEC_PCALAU12I_GR = 31,
  UNSPEC_ADD_TLS_LE_RELAX = 32,
  UNSPEC_ORI_L_LO12 = 33,
  UNSPEC_LUI_L_HI20 = 34,
  UNSPEC_LUI_H_LO20 = 35,
  UNSPEC_LUI_H_HI12 = 36,
  UNSPEC_TLS_LOW = 37,
  UNSPEC_FAKE_ANY_DIV = 38,
  UNSPEC_SIBCALL_VALUE_MULTIPLE_INTERNAL_1 = 39,
  UNSPEC_CALL_VALUE_MULTIPLE_INTERNAL_1 = 40,
  UNSPEC_LOAD_SYMBOL_OFFSET64 = 41,
  UNSPEC_LA_PCREL_64_PART1 = 42,
  UNSPEC_LA_PCREL_64_PART2 = 43,
  UNSPEC_COMPARE_AND_SWAP = 44,
  UNSPEC_COMPARE_AND_SWAP_ADD = 45,
  UNSPEC_COMPARE_AND_SWAP_SUB = 46,
  UNSPEC_COMPARE_AND_SWAP_AND = 47,
  UNSPEC_COMPARE_AND_SWAP_XOR = 48,
  UNSPEC_COMPARE_AND_SWAP_OR = 49,
  UNSPEC_COMPARE_AND_SWAP_NAND = 50,
  UNSPEC_SYNC_OLD_OP = 51,
  UNSPEC_SYNC_EXCHANGE = 52,
  UNSPEC_ATOMIC_STORE = 53,
  UNSPEC_ATOMIC_LOAD = 54,
  UNSPEC_MEMORY_BARRIER = 55,
  UNSPEC_SIMD_FRINTRP = 56,
  UNSPEC_SIMD_FRINTRZ = 57,
  UNSPEC_SIMD_FRINT = 58,
  UNSPEC_SIMD_FRINTRM = 59,
  UNSPEC_SIMD_FRINTRNE = 60,
  UNSPEC_SIMD_FCMP_CAF = 61,
  UNSPEC_SIMD_FCMP_SAF = 62,
  UNSPEC_SIMD_FCMP_SEQ = 63,
  UNSPEC_SIMD_FCMP_SUN = 64,
  UNSPEC_SIMD_FCMP_SUEQ = 65,
  UNSPEC_SIMD_FCMP_CNE = 66,
  UNSPEC_SIMD_FCMP_SOR = 67,
  UNSPEC_SIMD_FCMP_SUNE = 68,
  UNSPEC_LSX_ABSD_S = 69,
  UNSPEC_LSX_VABSD_U = 70,
  UNSPEC_LSX_VAVG_S = 71,
  UNSPEC_LSX_VAVG_U = 72,
  UNSPEC_LSX_VAVGR_S = 73,
  UNSPEC_LSX_VAVGR_U = 74,
  UNSPEC_LSX_VBITCLR = 75,
  UNSPEC_LSX_VBITCLRI = 76,
  UNSPEC_LSX_VBITREV = 77,
  UNSPEC_LSX_VBITREVI = 78,
  UNSPEC_LSX_VBITSET = 79,
  UNSPEC_LSX_VBITSETI = 80,
  UNSPEC_LSX_BRANCH_V = 81,
  UNSPEC_LSX_BRANCH = 82,
  UNSPEC_LSX_VFCLASS = 83,
  UNSPEC_LSX_VFCVT = 84,
  UNSPEC_LSX_VFCVTH = 85,
  UNSPEC_LSX_VFCVTL = 86,
  UNSPEC_LSX_VFLOGB = 87,
  UNSPEC_LSX_VFRECIP = 88,
  UNSPEC_LSX_VFRECIPE = 89,
  UNSPEC_LSX_VFRINT = 90,
  UNSPEC_LSX_VFRSQRT = 91,
  UNSPEC_LSX_VFRSQRTE = 92,
  UNSPEC_LSX_VFTINT_U = 93,
  UNSPEC_LSX_VSAT_S = 94,
  UNSPEC_LSX_VSAT_U = 95,
  UNSPEC_LSX_VREPLVEI = 96,
  UNSPEC_LSX_VSRAR = 97,
  UNSPEC_LSX_VSRARI = 98,
  UNSPEC_LSX_VSRLR = 99,
  UNSPEC_LSX_VSRLRI = 100,
  UNSPEC_LSX_VSHUF = 101,
  UNSPEC_LSX_VEXTW_S = 102,
  UNSPEC_LSX_VEXTW_U = 103,
  UNSPEC_LSX_VSLLWIL_S = 104,
  UNSPEC_LSX_VSLLWIL_U = 105,
  UNSPEC_LSX_VSRAN = 106,
  UNSPEC_LSX_VSSRAN_S = 107,
  UNSPEC_LSX_VSSRAN_U = 108,
  UNSPEC_LSX_VSRAIN = 109,
  UNSPEC_LSX_VSRAINS_S = 110,
  UNSPEC_LSX_VSRAINS_U = 111,
  UNSPEC_LSX_VSRARN = 112,
  UNSPEC_LSX_VSRLN = 113,
  UNSPEC_LSX_VSRLRN = 114,
  UNSPEC_LSX_VSSRLRN_U = 115,
  UNSPEC_LSX_VFRSTPI = 116,
  UNSPEC_LSX_VFRSTP = 117,
  UNSPEC_LSX_VSHUF4I = 118,
  UNSPEC_LSX_VBSRL_V = 119,
  UNSPEC_LSX_VBSLL_V = 120,
  UNSPEC_LSX_VEXTRINS = 121,
  UNSPEC_LSX_VMSKLTZ = 122,
  UNSPEC_LSX_VSIGNCOV = 123,
  UNSPEC_LSX_VFTINT_W_D = 124,
  UNSPEC_LSX_VFFINT_S_L = 125,
  UNSPEC_LSX_VFTINTRZ_W_D = 126,
  UNSPEC_LSX_VFTINTRP_W_D = 127,
  UNSPEC_LSX_VFTINTRM_W_D = 128,
  UNSPEC_LSX_VFTINTRNE_W_D = 129,
  UNSPEC_LSX_VFTINTL_L_S = 130,
  UNSPEC_LSX_VFFINTH_D_W = 131,
  UNSPEC_LSX_VFFINTL_D_W = 132,
  UNSPEC_LSX_VFTINTRZL_L_S = 133,
  UNSPEC_LSX_VFTINTRZH_L_S = 134,
  UNSPEC_LSX_VFTINTRPL_L_S = 135,
  UNSPEC_LSX_VFTINTRPH_L_S = 136,
  UNSPEC_LSX_VFTINTRMH_L_S = 137,
  UNSPEC_LSX_VFTINTRML_L_S = 138,
  UNSPEC_LSX_VFTINTRNEL_L_S = 139,
  UNSPEC_LSX_VFTINTRNEH_L_S = 140,
  UNSPEC_LSX_VFTINTH_L_H = 141,
  UNSPEC_LSX_VSSRARN_S = 142,
  UNSPEC_LSX_VSSRARN_U = 143,
  UNSPEC_LSX_VSSRLN_U = 144,
  UNSPEC_LSX_VSSRLN = 145,
  UNSPEC_LSX_VSSRLRN = 146,
  UNSPEC_LSX_VLDI = 147,
  UNSPEC_LSX_VSHUF_B = 148,
  UNSPEC_LSX_VSTX = 149,
  UNSPEC_LSX_VEXTL_QU_DU = 150,
  UNSPEC_LSX_VSETEQZ_V = 151,
  UNSPEC_LSX_VADDWEV = 152,
  UNSPEC_LSX_VADDWEV2 = 153,
  UNSPEC_LSX_VADDWEV3 = 154,
  UNSPEC_LSX_VADDWOD = 155,
  UNSPEC_LSX_VADDWOD2 = 156,
  UNSPEC_LSX_VADDWOD3 = 157,
  UNSPEC_LSX_VSUBWEV = 158,
  UNSPEC_LSX_VSUBWEV2 = 159,
  UNSPEC_LSX_VSUBWOD = 160,
  UNSPEC_LSX_VSUBWOD2 = 161,
  UNSPEC_LSX_VMULWEV = 162,
  UNSPEC_LSX_VMULWEV2 = 163,
  UNSPEC_LSX_VMULWEV3 = 164,
  UNSPEC_LSX_VMULWOD = 165,
  UNSPEC_LSX_VMULWOD2 = 166,
  UNSPEC_LSX_VMULWOD3 = 167,
  UNSPEC_LSX_VHADDW_Q_D = 168,
  UNSPEC_LSX_VHADDW_QU_DU = 169,
  UNSPEC_LSX_VHSUBW_Q_D = 170,
  UNSPEC_LSX_VHSUBW_QU_DU = 171,
  UNSPEC_LSX_VMADDWEV = 172,
  UNSPEC_LSX_VMADDWEV2 = 173,
  UNSPEC_LSX_VMADDWEV3 = 174,
  UNSPEC_LSX_VMADDWOD = 175,
  UNSPEC_LSX_VMADDWOD2 = 176,
  UNSPEC_LSX_VMADDWOD3 = 177,
  UNSPEC_LSX_VADD_Q = 178,
  UNSPEC_LSX_VSUB_Q = 179,
  UNSPEC_LSX_VEXTH_Q_D = 180,
  UNSPEC_LSX_VEXTH_QU_DU = 181,
  UNSPEC_LSX_VMSKGEZ = 182,
  UNSPEC_LSX_VMSKNZ = 183,
  UNSPEC_LSX_VEXTL_Q_D = 184,
  UNSPEC_LSX_VSRLNI = 185,
  UNSPEC_LSX_VSRLRNI = 186,
  UNSPEC_LSX_VSSRLNI = 187,
  UNSPEC_LSX_VSSRLNI2 = 188,
  UNSPEC_LSX_VSSRLRNI = 189,
  UNSPEC_LSX_VSSRLRNI2 = 190,
  UNSPEC_LSX_VSRANI = 191,
  UNSPEC_LSX_VSRARNI = 192,
  UNSPEC_LSX_VSSRANI = 193,
  UNSPEC_LSX_VSSRANI2 = 194,
  UNSPEC_LSX_VSSRARNI = 195,
  UNSPEC_LSX_VSSRARNI2 = 196,
  UNSPEC_LSX_VPERMI = 197,
  UNSPEC_LSX_VILVL_INTERNAL = 198,
  UNSPEC_LSX_VREPLVEI_MIRROR = 199,
  UNSPEC_LASX_XVABSD_S = 200,
  UNSPEC_LASX_XVABSD_U = 201,
  UNSPEC_LASX_XVAVG_S = 202,
  UNSPEC_LASX_XVAVG_U = 203,
  UNSPEC_LASX_XVAVGR_S = 204,
  UNSPEC_LASX_XVAVGR_U = 205,
  UNSPEC_LASX_XVBITCLR = 206,
  UNSPEC_LASX_XVBITCLRI = 207,
  UNSPEC_LASX_XVBITREV = 208,
  UNSPEC_LASX_XVBITREVI = 209,
  UNSPEC_LASX_XVBITSET = 210,
  UNSPEC_LASX_XVBITSETI = 211,
  UNSPEC_LASX_XVFCLASS = 212,
  UNSPEC_LASX_XVFCVT = 213,
  UNSPEC_LASX_XVFCVTH = 214,
  UNSPEC_LASX_XVFCVTL = 215,
  UNSPEC_LASX_XVFLOGB = 216,
  UNSPEC_LASX_XVFRECIP = 217,
  UNSPEC_LASX_XVFRECIPE = 218,
  UNSPEC_LASX_XVFRINT = 219,
  UNSPEC_LASX_XVFRSQRT = 220,
  UNSPEC_LASX_XVFRSQRTE = 221,
  UNSPEC_LASX_XVFTINT_U = 222,
  UNSPEC_LASX_XVCLO = 223,
  UNSPEC_LASX_XVSAT_S = 224,
  UNSPEC_LASX_XVSAT_U = 225,
  UNSPEC_LASX_XVREPLVE0 = 226,
  UNSPEC_LASX_XVREPL128VEI = 227,
  UNSPEC_LASX_XVSRAR = 228,
  UNSPEC_LASX_XVSRARI = 229,
  UNSPEC_LASX_XVSRLR = 230,
  UNSPEC_LASX_XVSRLRI = 231,
  UNSPEC_LASX_XVSHUF = 232,
  UNSPEC_LASX_XVSHUF_B = 233,
  UNSPEC_LASX_BRANCH = 234,
  UNSPEC_LASX_BRANCH_V = 235,
  UNSPEC_LASX_MXVEXTW_U = 236,
  UNSPEC_LASX_XVSLLWIL_S = 237,
  UNSPEC_LASX_XVSLLWIL_U = 238,
  UNSPEC_LASX_XVSRAN = 239,
  UNSPEC_LASX_XVSSRAN_S = 240,
  UNSPEC_LASX_XVSSRAN_U = 241,
  UNSPEC_LASX_XVSRARN = 242,
  UNSPEC_LASX_XVSSRARN_S = 243,
  UNSPEC_LASX_XVSSRARN_U = 244,
  UNSPEC_LASX_XVSRLN = 245,
  UNSPEC_LASX_XVSSRLN_U = 246,
  UNSPEC_LASX_XVSRLRN = 247,
  UNSPEC_LASX_XVSSRLRN_U = 248,
  UNSPEC_LASX_XVFRSTPI = 249,
  UNSPEC_LASX_XVFRSTP = 250,
  UNSPEC_LASX_XVSHUF4I = 251,
  UNSPEC_LASX_XVBSRL_V = 252,
  UNSPEC_LASX_XVBSLL_V = 253,
  UNSPEC_LASX_XVEXTRINS = 254,
  UNSPEC_LASX_XVMSKLTZ = 255,
  UNSPEC_LASX_XVSIGNCOV = 256,
  UNSPEC_LASX_XVFTINT_W_D = 257,
  UNSPEC_LASX_XVFFINT_S_L = 258,
  UNSPEC_LASX_XVFTINTRZ_W_D = 259,
  UNSPEC_LASX_XVFTINTRP_W_D = 260,
  UNSPEC_LASX_XVFTINTRM_W_D = 261,
  UNSPEC_LASX_XVFTINTRNE_W_D = 262,
  UNSPEC_LASX_XVFTINTH_L_S = 263,
  UNSPEC_LASX_XVFTINTL_L_S = 264,
  UNSPEC_LASX_XVFFINTH_D_W = 265,
  UNSPEC_LASX_XVFFINTL_D_W = 266,
  UNSPEC_LASX_XVFTINTRZH_L_S = 267,
  UNSPEC_LASX_XVFTINTRZL_L_S = 268,
  UNSPEC_LASX_XVFTINTRPH_L_S = 269,
  UNSPEC_LASX_XVFTINTRPL_L_S = 270,
  UNSPEC_LASX_XVFTINTRMH_L_S = 271,
  UNSPEC_LASX_XVFTINTRML_L_S = 272,
  UNSPEC_LASX_XVFTINTRNEL_L_S = 273,
  UNSPEC_LASX_XVFTINTRNEH_L_S = 274,
  UNSPEC_LASX_XVREPLVE0_Q = 275,
  UNSPEC_LASX_XVPERM_W = 276,
  UNSPEC_LASX_XVPERMI_Q = 277,
  UNSPEC_LASX_XVPERMI_D = 278,
  UNSPEC_LASX_XVADDWEV = 279,
  UNSPEC_LASX_XVADDWEV2 = 280,
  UNSPEC_LASX_XVADDWEV3 = 281,
  UNSPEC_LASX_XVSUBWEV = 282,
  UNSPEC_LASX_XVSUBWEV2 = 283,
  UNSPEC_LASX_XVMULWEV = 284,
  UNSPEC_LASX_XVMULWEV2 = 285,
  UNSPEC_LASX_XVMULWEV3 = 286,
  UNSPEC_LASX_XVADDWOD = 287,
  UNSPEC_LASX_XVADDWOD2 = 288,
  UNSPEC_LASX_XVADDWOD3 = 289,
  UNSPEC_LASX_XVSUBWOD = 290,
  UNSPEC_LASX_XVSUBWOD2 = 291,
  UNSPEC_LASX_XVMULWOD = 292,
  UNSPEC_LASX_XVMULWOD2 = 293,
  UNSPEC_LASX_XVMULWOD3 = 294,
  UNSPEC_LASX_XVMADDWEV = 295,
  UNSPEC_LASX_XVMADDWEV2 = 296,
  UNSPEC_LASX_XVMADDWEV3 = 297,
  UNSPEC_LASX_XVMADDWOD = 298,
  UNSPEC_LASX_XVMADDWOD2 = 299,
  UNSPEC_LASX_XVMADDWOD3 = 300,
  UNSPEC_LASX_XVHADDW_Q_D = 301,
  UNSPEC_LASX_XVHSUBW_Q_D = 302,
  UNSPEC_LASX_XVHADDW_QU_DU = 303,
  UNSPEC_LASX_XVHSUBW_QU_DU = 304,
  UNSPEC_LASX_XVADD_Q = 305,
  UNSPEC_LASX_XVSUB_Q = 306,
  UNSPEC_LASX_XVREPLVE = 307,
  UNSPEC_LASX_XVSHUF4 = 308,
  UNSPEC_LASX_XVMSKGEZ = 309,
  UNSPEC_LASX_XVMSKNZ = 310,
  UNSPEC_LASX_XVEXTH_Q_D = 311,
  UNSPEC_LASX_XVEXTH_QU_DU = 312,
  UNSPEC_LASX_XVEXTL_Q_D = 313,
  UNSPEC_LASX_XVSRLNI = 314,
  UNSPEC_LASX_XVSRLRNI = 315,
  UNSPEC_LASX_XVSSRLNI = 316,
  UNSPEC_LASX_XVSSRLNI2 = 317,
  UNSPEC_LASX_XVSSRLRNI = 318,
  UNSPEC_LASX_XVSSRLRNI2 = 319,
  UNSPEC_LASX_XVSRANI = 320,
  UNSPEC_LASX_XVSRARNI = 321,
  UNSPEC_LASX_XVSSRANI = 322,
  UNSPEC_LASX_XVSSRANI2 = 323,
  UNSPEC_LASX_XVSSRARNI = 324,
  UNSPEC_LASX_XVSSRARNI2 = 325,
  UNSPEC_LASX_XVPERMI = 326,
  UNSPEC_LASX_XVINSVE0 = 327,
  UNSPEC_LASX_XVPICKVE = 328,
  UNSPEC_LASX_XVSSRLN = 329,
  UNSPEC_LASX_XVSSRLRN = 330,
  UNSPEC_LASX_XVEXTL_QU_DU = 331,
  UNSPEC_LASX_XVLDI = 332,
  UNSPEC_LASX_XVSTX = 333,
  UNSPEC_LASX_VECINIT_MERGE = 334,
  UNSPEC_LASX_VEC_SET_INTERNAL = 335,
  UNSPEC_LASX_XVILVL_INTERNAL = 336,
  UNSPEC_ADDRESS_FIRST = 337
};
#define NUM_UNSPEC_VALUES 338
extern const char *const unspec_strings[];

enum unspecv {
  UNSPECV_BLOCKAGE = 0,
  UNSPECV_DBAR = 1,
  UNSPECV_IBAR = 2,
  UNSPECV_CSRRD = 3,
  UNSPECV_CSRWR = 4,
  UNSPECV_CSRXCHG = 5,
  UNSPECV_IOCSRRD = 6,
  UNSPECV_IOCSRWR = 7,
  UNSPECV_CACOP = 8,
  UNSPECV_LDDIR = 9,
  UNSPECV_LDPTE = 10,
  UNSPECV_ERTN = 11,
  UNSPECV_PROBE_STACK_RANGE = 12,
  UNSPECV_MOVFCSR2GR = 13,
  UNSPECV_MOVGR2FCSR = 14,
  UNSPECV_CPUCFG = 15,
  UNSPECV_ASRTLE_D = 16,
  UNSPECV_ASRTGT_D = 17,
  UNSPECV_SYSCALL = 18,
  UNSPECV_BREAK = 19
};
#define NUM_UNSPECV_VALUES 20
extern const char *const unspecv_strings[];

#endif /* GCC_INSN_CONSTANTS_H */
