# SPDX-License-Identifier: GPL-2.0-or-later

#
# Texas Instruments CC32xx - ARM Cortex-M4
#
# http://www.ti.com/product/CC3200
# http://www.ti.com/product/CC3220
#

source [find target/swj-dp.tcl]
source [find target/icepick.cfg]

if { [info exists CHIPNAME] } {
	set _CHIPNAME $CHIPNAME
} else {
	set _CHIPNAME cc32xx
}

#
# Main DAP
#
if { [info exists DAP_TAPID] } {
	set _DAP_TAPID $DAP_TAPID
} else {
	if {[using_jtag]} {
		set _DAP_TAPID 0x4BA00477
	} else {
		set _DAP_TAPID 0x2BA01477
	}
}

if {[using_jtag]} {
	jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
	jtag configure $_CHIPNAME.cpu -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
} else {
	swj_newdap $_CHIPNAME cpu -expected-id $_DAP_TAPID
}

#
# ICEpick-C (JTAG route controller)
#
if { [info exists JRC_TAPID] } {
	set _JRC_TAPID $JRC_TAPID
} else {
	set _JRC_TAPID 0x0B97C02F
}

if {[using_jtag]} {
	jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
	jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.cpu"
}

set _TARGETNAME $_CHIPNAME.cpu
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap

if { [info exists WORKAREASIZE] } {
	set _WORKAREASIZE $WORKAREASIZE
} else {
	set _WORKAREASIZE 0x2000
}

$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
